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| author | Matt Strapp <msattr@gmail.com> | 2020-02-09 09:33:01 -0600 |
|---|---|---|
| committer | Matt Strapp <msattr@gmail.com> | 2020-02-09 09:33:01 -0600 |
| commit | 01899738289d51fbfbdcf0c6d2d32d8817ae72e7 (patch) | |
| tree | 9ab770d185ce89848523cec5b536371d8a6aedf2 | |
| parent | Add asm file (diff) | |
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Add delay calc
Diffstat (limited to '')
| -rw-r--r-- | Lab 2.X/Lab2A.s | 63 |
1 files changed, 59 insertions, 4 deletions
diff --git a/Lab 2.X/Lab2A.s b/Lab 2.X/Lab2A.s index fc9f30c..fa35d55 100644 --- a/Lab 2.X/Lab2A.s +++ b/Lab 2.X/Lab2A.s @@ -31,8 +31,10 @@ _main: mov w0,AD1PCFG ; Set all pins to digital mode
mov #0b1111111111111110,w0
mov w0,TRISA ; set pin RA0 to output
- mov #0x0001,w0
- mov w0,LATA ; set pin RA0 high
+ mov #0x0000,w0
+ mov w0,LATA ; set pin RA0 low
+ call delay_100us
+ call setColor
call foreverLoop
wait_24cycles:
@@ -56,12 +58,65 @@ delay_1ms: nop
return
-foreverLoop:
-
+write_bit_stream:
call wait_24cycles ; 24 cycles
clr LATA ; set pin RA0 low = 1 cycle
call wait_32cycles ; 32 cycles
inc LATA ; set pin RA0 high = 1 cycle
+ return
+
+write_0: ;2 cycles for function call
+ inc LATA ;1
+ repeat #3 ;1 for load
+ nop ;3+1=4 nop
+ clr LATA ;1
+ repeat #6 ;1 for load
+ nop ;1+6=7 nop
+ return ;3 return
+
+
+write_1: ;2 cycle call
+ inc LATA ;1
+ repeat #10;1 load
+ nop ;1+10=11 nop
+ clr LATA ;1
+ nop ;1
+ return ;3 return
+
+setColor:
+ ;Set R
+ call write_1
+ call write_1
+ call write_1
+ call write_1
+ call write_1
+ call write_1
+ call write_1
+ call write_1
+ ;Set G
+ call write_1
+ call write_0
+ call write_0
+ call write_1
+ call write_1
+ call write_0
+ call write_1
+ call write_1
+ ;Set B
+ call write_0
+ call write_0
+ call write_0
+ call write_0
+ call write_0
+ call write_0
+ call write_0
+ call write_0
+
+ return
+
+foreverLoop:
+; call write_bit_stream
+ nop
bra foreverLoop
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