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authorMatt Strapp <msattr@gmail.com>2020-02-09 09:32:40 -0600
committerMatt Strapp <msattr@gmail.com>2020-02-09 09:32:40 -0600
commitdf8bcfec71421388d5afcda349c80113644e9b4d (patch)
tree8874e2c9a4ef21d8c22b4c1dcdd36a9b4cb028f2
parentAdd discussion Stuff (diff)
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Add C file
Diffstat (limited to '')
-rw-r--r--Lab_2B.X/lab2b_c.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/Lab_2B.X/lab2b_c.c b/Lab_2B.X/lab2b_c.c
new file mode 100644
index 0000000..063dfd9
--- /dev/null
+++ b/Lab_2B.X/lab2b_c.c
@@ -0,0 +1,33 @@
+#include "xc.h"
+// CW1: FLASH CONFIGURATION WORD 1 (see PIC24 Family Reference Manual 24.1)
+#pragma config ICS = PGx1 // Comm Channel Select (Emulator EMUC1/EMUD1 pins are shared with PGC1/PGD1)
+#pragma config FWDTEN = OFF // Watchdog Timer Enable (Watchdog Timer is disabled)
+#pragma config GWRP = OFF // General Code Segment Write Protect (Writes to program memory are allowed)
+#pragma config GCP = OFF // General Code Segment Code Protect (Code protection is disabled)
+#pragma config JTAGEN = OFF // JTAG Port Enable (JTAG port is disabled)
+
+
+// CW2: FLASH CONFIGURATION WORD 2 (see PIC24 Family Reference Manual 24.1)
+#pragma config I2C1SEL = PRI // I2C1 Pin Location Select (Use default SCL1/SDA1 pins)
+#pragma config IOL1WAY = OFF // IOLOCK Protection (IOLOCK may be changed via unlocking seq)
+#pragma config OSCIOFNC = ON // Primary Oscillator I/O Function (CLKO/RC15 functions as I/O pin)
+#pragma config FCKSM = CSECME // Clock Switching and Monitor (Clock switching is enabled,
+ // Fail-Safe Clock Monitor is enabled)
+#pragma config FNOSC = FRCPLL // Oscillator Select (Fast RC Oscillator with PLL module (FRCPLL))
+
+
+void setup(void) {
+ CLKDIVbits.RCDIV = 0; //Set RCDIV=1:1 (default 2:1) 32MHz or FCY/2=16M
+}
+void loop(void);
+int main(void) {
+ setup();
+ loop();
+ return 0;
+}
+
+void loop(void) {
+ while (1) {
+ //do nothing
+ }
+} \ No newline at end of file