diff options
Diffstat (limited to 'OLD/ee4363/mp1/mp11')
| -rw-r--r-- | OLD/ee4363/mp1/mp11/MIPSALU.v | 18 | ||||
| -rw-r--r-- | OLD/ee4363/mp1/mp11/MIPSAlu.vcd | 58 | ||||
| -rw-r--r-- | OLD/ee4363/mp1/mp11/out | 152 | ||||
| -rw-r--r-- | OLD/ee4363/mp1/mp11/test_mipsalu.v | 49 |
4 files changed, 277 insertions, 0 deletions
diff --git a/OLD/ee4363/mp1/mp11/MIPSALU.v b/OLD/ee4363/mp1/mp11/MIPSALU.v new file mode 100644 index 0000000..096aff5 --- /dev/null +++ b/OLD/ee4363/mp1/mp11/MIPSALU.v @@ -0,0 +1,18 @@ +module MIPSALU (ALUctl, A, B, ALUOut, Zero); + input [3:0] ALUctl; + input [31:0] A,B; + output reg [31:0] ALUOut; + output Zero; + assign Zero = (ALUOut==0); + always @(ALUctl, A, B) + case (ALUctl) + 0: ALUOut <= A & B; + 1: ALUOut <= A | B; + 2: ALUOut <= A + B; + 6: ALUOut <= A - B; + 7: ALUOut <= A < B ? 1:0; + 12: ALUOut <= ~(A | B); + default: ALUOut <= 0; + endcase +endmodule + diff --git a/OLD/ee4363/mp1/mp11/MIPSAlu.vcd b/OLD/ee4363/mp1/mp11/MIPSAlu.vcd new file mode 100644 index 0000000..b81fdb8 --- /dev/null +++ b/OLD/ee4363/mp1/mp11/MIPSAlu.vcd @@ -0,0 +1,58 @@ +$date + Thu Dec 3 09:43:49 2020 +$end +$version + Icarus Verilog +$end +$timescale + 100ps +$end +$scope module test_mipsalu $end +$var wire 1 ! Zero $end +$var wire 32 " ALUOut [31:0] $end +$var reg 32 # A [31:0] $end +$var reg 4 $ ALUctl [3:0] $end +$var reg 32 % B [31:0] $end +$scope module U0 $end +$var wire 32 & A [31:0] $end +$var wire 4 ' ALUctl [3:0] $end +$var wire 32 ( B [31:0] $end +$var wire 1 ! Zero $end +$var reg 32 ) ALUOut [31:0] $end +$upscope $end +$upscope $end +$enddefinitions $end +#0 +$dumpvars +b0 ) +b1 ( +bx ' +b1111 & +b1 % +bx $ +b1111 # +b0 " +1! +$end +#100 +0! +b1 " +b1 ) +b0 $ +b0 ' +#200 +b1111 " +b1111 ) +b1 $ +b1 ' +#300 +b10000 " +b10000 ) +b10 $ +b10 ' +#400 +b1110 " +b1110 ) +b110 $ +b110 ' +#500 diff --git a/OLD/ee4363/mp1/mp11/out b/OLD/ee4363/mp1/mp11/out new file mode 100644 index 0000000..b09d3dc --- /dev/null +++ b/OLD/ee4363/mp1/mp11/out @@ -0,0 +1,152 @@ +#! /usr/bin/vvp +:ivl_version "10.3 (stable)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision - 10; +:vpi_module "system"; +:vpi_module "vhdl_sys"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x5600cdc34d10 .scope module, "test_mipsalu" "test_mipsalu" 2 8; + .timescale -9 -10; +v0x5600cdc4a050_0 .var "A", 31 0; +v0x5600cdc4a130_0 .net "ALUOut", 31 0, v0x5600cdc49b10_0; 1 drivers +v0x5600cdc4a200_0 .var "ALUctl", 3 0; +v0x5600cdc4a300_0 .var "B", 31 0; +v0x5600cdc4a3d0_0 .net "Zero", 0 0, L_0x5600cdc5a530; 1 drivers +S_0x5600cdc34e90 .scope module, "U0" "MIPSALU" 2 19, 3 1 0, S_0x5600cdc34d10; + .timescale -9 -10; + .port_info 0 /INPUT 4 "ALUctl" + .port_info 1 /INPUT 32 "A" + .port_info 2 /INPUT 32 "B" + .port_info 3 /OUTPUT 32 "ALUOut" + .port_info 4 /OUTPUT 1 "Zero" +v0x5600cdbfd130_0 .net "A", 31 0, v0x5600cdc4a050_0; 1 drivers +v0x5600cdc49b10_0 .var "ALUOut", 31 0; +v0x5600cdc49bf0_0 .net "ALUctl", 3 0, v0x5600cdc4a200_0; 1 drivers +v0x5600cdc49ce0_0 .net "B", 31 0, v0x5600cdc4a300_0; 1 drivers +v0x5600cdc49dc0_0 .net "Zero", 0 0, L_0x5600cdc5a530; alias, 1 drivers +L_0x7f1879ed6018 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; +v0x5600cdc49ed0_0 .net/2u *"_s0", 31 0, L_0x7f1879ed6018; 1 drivers +E_0x5600cdc327b0 .event edge, v0x5600cdc49ce0_0, v0x5600cdbfd130_0, v0x5600cdc49bf0_0; +L_0x5600cdc5a530 .cmp/eq 32, v0x5600cdc49b10_0, L_0x7f1879ed6018; + .scope S_0x5600cdc34e90; +T_0 ; + %wait E_0x5600cdc327b0; + %load/vec4 v0x5600cdc49bf0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_0.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_0.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_0.2, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_0.3, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_0.4, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_0.5, 6; + %pushi/vec4 0, 0, 32; + %assign/vec4 v0x5600cdc49b10_0, 0; + %jmp T_0.7; +T_0.0 ; + %load/vec4 v0x5600cdbfd130_0; + %load/vec4 v0x5600cdc49ce0_0; + %and; + %assign/vec4 v0x5600cdc49b10_0, 0; + %jmp T_0.7; +T_0.1 ; + %load/vec4 v0x5600cdbfd130_0; + %load/vec4 v0x5600cdc49ce0_0; + %or; + %assign/vec4 v0x5600cdc49b10_0, 0; + %jmp T_0.7; +T_0.2 ; + %load/vec4 v0x5600cdbfd130_0; + %load/vec4 v0x5600cdc49ce0_0; + %add; + %assign/vec4 v0x5600cdc49b10_0, 0; + %jmp T_0.7; +T_0.3 ; + %load/vec4 v0x5600cdbfd130_0; + %load/vec4 v0x5600cdc49ce0_0; + %sub; + %assign/vec4 v0x5600cdc49b10_0, 0; + %jmp T_0.7; +T_0.4 ; + %load/vec4 v0x5600cdbfd130_0; + %load/vec4 v0x5600cdc49ce0_0; + %cmp/u; + %flag_mov 8, 5; + %jmp/0 T_0.8, 8; + %pushi/vec4 1, 0, 32; + %jmp/1 T_0.9, 8; +T_0.8 ; End of true expr. + %pushi/vec4 0, 0, 32; + %jmp/0 T_0.9, 8; + ; End of false expr. + %blend; +T_0.9; + %assign/vec4 v0x5600cdc49b10_0, 0; + %jmp T_0.7; +T_0.5 ; + %load/vec4 v0x5600cdbfd130_0; + %load/vec4 v0x5600cdc49ce0_0; + %or; + %inv; + %assign/vec4 v0x5600cdc49b10_0, 0; + %jmp T_0.7; +T_0.7 ; + %pop/vec4 1; + %jmp T_0; + .thread T_0, $push; + .scope S_0x5600cdc34d10; +T_1 ; + %pushi/vec4 15, 0, 32; + %store/vec4 v0x5600cdc4a050_0, 0, 32; + %pushi/vec4 1, 0, 32; + %store/vec4 v0x5600cdc4a300_0, 0, 32; + %delay 100, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x5600cdc4a200_0, 0, 4; + %delay 100, 0; + %pushi/vec4 1, 0, 4; + %store/vec4 v0x5600cdc4a200_0, 0, 4; + %delay 100, 0; + %pushi/vec4 2, 0, 4; + %store/vec4 v0x5600cdc4a200_0, 0, 4; + %delay 100, 0; + %pushi/vec4 6, 0, 4; + %store/vec4 v0x5600cdc4a200_0, 0, 4; + %delay 100, 0; + %vpi_call 2 32 "$finish" {0 0 0}; + %end; + .thread T_1; + .scope S_0x5600cdc34d10; +T_2 ; + %vpi_call 2 38 "$monitor", $time, " A = %h", v0x5600cdc4a050_0, " B = %h", v0x5600cdc4a300_0, " ALUOut = %h", v0x5600cdc4a130_0, " Zero = %b", v0x5600cdc4a3d0_0 {0 0 0}; + %end; + .thread T_2; + .scope S_0x5600cdc34d10; +T_3 ; + %vpi_call 2 43 "$dumpfile", "MIPSAlu.vcd" {0 0 0}; + %vpi_call 2 44 "$dumpvars" {0 0 0}; + %end; + .thread T_3; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + "<interactive>"; + "test_mipsalu.v"; + "./MIPSALU.v"; diff --git a/OLD/ee4363/mp1/mp11/test_mipsalu.v b/OLD/ee4363/mp1/mp11/test_mipsalu.v new file mode 100644 index 0000000..9738ed5 --- /dev/null +++ b/OLD/ee4363/mp1/mp11/test_mipsalu.v @@ -0,0 +1,49 @@ + `timescale 1ns/100ps +// +// Test Bench for the mips alu +// T. Posbergh, 14 October 2012 +// + `include "MIPSALU.v" +// +module test_mipsalu; + wire Zero; // ALU bit output + wire [31:0] ALUOut; // ALU word output + reg [31:0] A,B; // ALU word inpus + reg [3:0] ALUctl; + + reg clock; + reg reset; + +// instantiate the alu and control + + MIPSALU U0(ALUctl, A, B, ALUOut, Zero); + +// generate test signals + + initial + begin + A=32'b0000_0000_0000_0000_0000_0000_0000_1111; + B=32'b0000_0000_0000_0000_0000_0000_0000_0001; + #10 ALUctl=4'b0000; + #10 ALUctl=4'b0001; + #10 ALUctl=4'b0010; + #10 ALUctl=4'b0110; +// $finish(100); + #10 $finish; + end + +// output result + + initial + $monitor($time, " A = %h",A," B = %h",B," ALUOut = %h",ALUOut," Zero = %b",Zero); + +// the following generates vcd file for GTKwave + initial + begin + $dumpfile("MIPSAlu.vcd"); + $dumpvars; + end + +endmodule + + |