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authorMatt Strapp <msattr@gmail.com>2020-02-19 11:20:17 -0600
committerMatt Strapp <msattr@gmail.com>2020-02-19 11:20:17 -0600
commit13c4435d1f60bfc82d04048482d7131216c23afd (patch)
tree9fbcb981a36098328975f0e6bc400e2fbb372c7e
parentDo lab 3 (partially) (diff)
parente (diff)
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Merge origin/master
-rw-r--r--Lab_2B.X/lab2b_c.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/Lab_2B.X/lab2b_c.c b/Lab_2B.X/lab2b_c.c
index b33d126..f7150c9 100644
--- a/Lab_2B.X/lab2b_c.c
+++ b/Lab_2B.X/lab2b_c.c
@@ -16,7 +16,7 @@
#pragma config FCKSM = CSECME // Clock Switching and Monitor (Clock switching is enabled,
// Fail-Safe Clock Monitor is enabled)
#pragma config FNOSC = FRCPLL // Oscillator Select (Fast RC Oscillator with PLL module (FRCPLL))
-#define PERIOD 20
+#define PERIOD 30
//DEFINTIONS
void writeColor(int r, int g, int b);
@@ -113,10 +113,9 @@ void writeColor(int r, int g, int b) {
}
void delay(int delay_in_ms) {
- int i = 0;
- while (i < delay_in_ms) {
+ int i;
+ for (i = 0; i < delay_in_ms; i++) {
wait_1ms();
- i++;
}
}