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author | RossTheRoss <mstrapp@protonmail.com> | 2021-01-17 12:57:21 -0600 |
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committer | RossTheRoss <mstrapp@protonmail.com> | 2021-01-17 12:57:21 -0600 |
commit | dde37c31a72f4773e95faf8223ef450440bdb62c (patch) | |
tree | e238837d1d2f364b95483f6281960f9483078c1a /OLD/ee4363/mp1/mp11/test_mipsalu.v | |
parent | IDK (diff) | |
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get rid of that trash
Diffstat (limited to 'OLD/ee4363/mp1/mp11/test_mipsalu.v')
-rw-r--r-- | OLD/ee4363/mp1/mp11/test_mipsalu.v | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/OLD/ee4363/mp1/mp11/test_mipsalu.v b/OLD/ee4363/mp1/mp11/test_mipsalu.v new file mode 100644 index 0000000..9738ed5 --- /dev/null +++ b/OLD/ee4363/mp1/mp11/test_mipsalu.v @@ -0,0 +1,49 @@ + `timescale 1ns/100ps +// +// Test Bench for the mips alu +// T. Posbergh, 14 October 2012 +// + `include "MIPSALU.v" +// +module test_mipsalu; + wire Zero; // ALU bit output + wire [31:0] ALUOut; // ALU word output + reg [31:0] A,B; // ALU word inpus + reg [3:0] ALUctl; + + reg clock; + reg reset; + +// instantiate the alu and control + + MIPSALU U0(ALUctl, A, B, ALUOut, Zero); + +// generate test signals + + initial + begin + A=32'b0000_0000_0000_0000_0000_0000_0000_1111; + B=32'b0000_0000_0000_0000_0000_0000_0000_0001; + #10 ALUctl=4'b0000; + #10 ALUctl=4'b0001; + #10 ALUctl=4'b0010; + #10 ALUctl=4'b0110; +// $finish(100); + #10 $finish; + end + +// output result + + initial + $monitor($time, " A = %h",A," B = %h",B," ALUOut = %h",ALUOut," Zero = %b",Zero); + +// the following generates vcd file for GTKwave + initial + begin + $dumpfile("MIPSAlu.vcd"); + $dumpvars; + end + +endmodule + + |