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| author | RossTheRoss <mstrapp@protonmail.com> | 2020-12-18 19:42:33 -0600 |
|---|---|---|
| committer | RossTheRoss <mstrapp@protonmail.com> | 2020-12-18 19:42:33 -0600 |
| commit | 03e522d164dfd9e49a1fbc2f23134cdcb1544286 (patch) | |
| tree | 4b20ba96084ca10a78a0b1c97cb365e268724f90 /ee4363/mp2 | |
| parent | add things (diff) | |
| download | homework-03e522d164dfd9e49a1fbc2f23134cdcb1544286.tar homework-03e522d164dfd9e49a1fbc2f23134cdcb1544286.tar.gz homework-03e522d164dfd9e49a1fbc2f23134cdcb1544286.tar.bz2 homework-03e522d164dfd9e49a1fbc2f23134cdcb1544286.tar.lz homework-03e522d164dfd9e49a1fbc2f23134cdcb1544286.tar.xz homework-03e522d164dfd9e49a1fbc2f23134cdcb1544286.tar.zst homework-03e522d164dfd9e49a1fbc2f23134cdcb1544286.zip | |
comment
Diffstat (limited to 'ee4363/mp2')
| -rw-r--r-- | ee4363/mp2/mipspipe_mp2.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ee4363/mp2/mipspipe_mp2.v b/ee4363/mp2/mipspipe_mp2.v index 784b669..9ea9fc2 100644 --- a/ee4363/mp2/mipspipe_mp2.v +++ b/ee4363/mp2/mipspipe_mp2.v @@ -43,7 +43,7 @@ module mipspipe_mp2 (clock); assign bypassAfromLWinWB = (IDEXrs == MEMWBIR[20:16]) & (IDEXrs!=0) & (MEMWBop==LW); // The bypass to input B from the WB stage for an LW operation assign bypassBfromLWinWB = 0; - //Stall in case of WB + //Stall to bypass A or B if need b (I'm not sorry) assign bypassIDEXAfromWB = ((MEMWBIR != nop) & (IFIDIR != nop) & (IFIDrs == MEMWBrt) & (MEMWBop == LW)) | ((MEMWBop == ALUop) & (MEMWBrd == IFIDrs)); assign bypassIDEXBfromWB = ((MEMWBIR != nop) & (IFIDIR != nop) & (IFIDrt == MEMWBrt) & (MEMWBop == LW)) | |